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IP Logic Design and Verification Engineer

at Intel in Oklahoma City, Oklahoma, United States

Job Description

Job Description

The Group:

Intel’s Advanced Design Organization (AD) within Design Enablement (DE) focused on pathfinding and development of advanced logic, memory, and analog/mixed-signal circuits to enable best-in-class Foundational IP collateral and product design across all generations of Intel process technology. Critical technologies AD delivers to Intel are Digital and Analog Standard Cell Libraries, Embedded Memory (SRAM, RF, ROM, eDRAM, Fuse, etc.), Analog Circuit Reference Designs (PLL, DLL, VR, etc.), High-speed I/O Reference Designs (DDR, SerDes, GPIO), RF and Wireless Circuits (Wave Guide TX, Power Amplifier) .

The Role:

As an SoC Design and Verification Engineer in the Analog/Mixed-Signal Circuit Technology (AMSCT) team within Advanced Design, you will contribute to the system design and verification of the first Analog/Mixed Signal and I/O circuits in each of Intel’s process technology nodes, benchmark Intel’s process technology for these applications, and interact with internal and foundry customers to support their adoption of Intel’s most advanced technology nodes for these IPs.

Responsibilities include but are not limited to the following:

+ Design the digital interface, built-in self-test (BIST), calibration and equalization for high-speed I/O circuits in RTL and/or firmware

+ Provide specifications for APR

+ Verify the system including behavioral models for analog components

+ Transfer pre-silicon tests to post-silicon bench and Sort tests

\#DesignEnablement

Qualifications

Minimum:

+ Master’s degree in Electrical, Computer or Electrical and Computer Engineering with at least 3 years of professional work experience in digital architecture, design and/or verification

OR

+ PhD in the same technical disciplines with dissertation related to digital architecture, design or verification

AND

Both experience levels require hands-on experience in each of the 3 following areas:

+ Logic/RTL design

+ Digital architecture

+ Functional verification

Inside this Business Group

As the world’s largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art — from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology Development and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore’s Law to bring smart, connected devices to every person on Earth.

Other Locations

US,TX,Austin;US,AZ,Phoenix;US,CA,Folsom;US,CA,San Jose;US,CA,Santa Clara

Covid Statement

Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Benefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here: https://www.intel.com/content/www/us/en/jobs/benefits.html

Annual Salary Range for jobs which could be performed in US, California: $139,480.00-$209,760.00

*Salary range dependent on a number of factors including location and experience

Working Model

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.

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Job Posting: JC231158136

Posted On: Dec 25, 2022

Updated On: Mar 25, 2023

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